| ??? 11/12/03 20:31 Read: times |
#58438 - RE: Memory interfacing problem Responding to: ???'s previous message |
Hi,
just a note about CE signal. You said CE_ ---- i toggle it using p3.2 Please read RAM datasheet carefully to avoid potential problems in the future. I have used some types of RAM (for example, FRAM from Ramtron) which use CE as address latch signal. By other words, when you make CE signal LOW via CLR PORT.PIN then RAM chip locks A0...Axx internaly at same time. Unfortunately actual values of the address lines are incorrect because they will be correct only when MOVX@ executes late. So as result, RAM is accessed with wrong address. Good days! |
| Topic | Author | Date |
| Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: bull | 01/01/70 00:00 | |
| !WR output destroyed? | 01/01/70 00:00 | |
| RE: !WR output destroyed? | 01/01/70 00:00 | |
| RE: !WR output destroyed? | 01/01/70 00:00 | |
| RE: !WR output destroyed? | 01/01/70 00:00 | |
RE: !WR output destroyed? | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 |



