| ??? 11/13/03 21:22 Read: times |
#58586 - RE: Memory interfacing problem Responding to: ???'s previous message |
Hi,
yes, it is truth. Here it is copied from FM1808 (256Kb Bytewide FRAM Memory) datasheet: Chip Enable: /CE selects the device when low. Asserting /CE low causes the address to be latched internally. Address changes that occur after /CE goes low will be ignored until the next falling edge occurs. I have used this chip and checked that it is really true. So it is the point why I indicated the attention note. cu |
| Topic | Author | Date |
| Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: bull | 01/01/70 00:00 | |
| !WR output destroyed? | 01/01/70 00:00 | |
| RE: !WR output destroyed? | 01/01/70 00:00 | |
| RE: !WR output destroyed? | 01/01/70 00:00 | |
| RE: !WR output destroyed? | 01/01/70 00:00 | |
RE: !WR output destroyed? | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 | |
| RE: Memory interfacing problem | 01/01/70 00:00 |



