Well then you need to properly handle the serial subsystem. A review of 8051 the architecture shows you that a prerequisite for serial reception and transfer into SBUF, is that the RI bit be clear. The 8051 executes your ISR in response to RI becoming set, then your code must clear RI to enable further reception.


Yes, assuming that after clearing RI, it becomes set again, indicating that new data is available in SBUF.