| ??? 02/11/04 21:24 Read: times |
#64527 - RE: Circular buffers Responding to: ???'s previous message |
erik malund wrote:
------------------------------- IE0 is a higher priority interrupt so it can interrupt the RI/TI interrupt. Read "the bible" ch 3 No interrupt can interrupt an interrupt of the same "IP priority" Erik Then the documentation is confusing: From the "8051 bible" p. 16: A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low-priority interrupt. A high-priority interrupt can’t be interrupted by any other interrupt source. Source Priority Within Level 1. IE0 (highest) 2. TF0 3. IE1 4. TF1 5. RI+TI (lowest) I interpret this to mean that if you are servicing a RI+TI interrupt that you can be interrupted by a IE0 interrupt. Is the above scheme only valid when the IP register is not all zeros? Or does this scheme apply in all cases? Jacob |



