??? 11/24/04 14:27 Read: times |
#81850 - configuration again Responding to: ???'s previous message |
hi,
...however 8052 detects a negative going pulse on P3.2 and latches the IE0 bit. Only if external interrupt is configured correctly! It is why I asked you about external interrupt configuration. By default, TCON activated with zero value. As result, IT0 is set to 0 after reset. So, if you do not set bit IT0 in TCON manually then IE0 does not indicate negative edge transition. When IT0 is 0 then IE0 just copies invert state of pin /INT0. And you is not able to clean it with IE0=0; - when IT0=0 then IE0 keeps state =1 as long as /INT0 pin is low (due level sensetive detector is used). Regards, Oleg |