Hi José,

I work for Hitex Development Tools, a company that builds in-circuit emulators and more. Among others, we offer a development platform for FPGA based 8051 designs and because I was the one who developped the test designs I gathered some experience with 8051 cores that I can share with you. I gained some other experience because some of our customers that use our 8051 emulators use them for SoC design based on different 8051 cores and these customers needed technical support. So what can I tell you? First of all: It really works. The last test design I made was built around the Mentor Graphics M8051EW core. This is a 2-clock core that achieves 6 times the performance of a standard 8051 when clocked at the same frequency. It consumes about 2000 logic cells of an Altera Cyclone FPGA and thus fittes into the smalles device of this FPGA family that is available. It can run at least at 20 MHz what is comparable to a 120 MHz 8051. In the real world, such a frequency cannot be reached if you have a FLASH program memory because one byte is fetched every single clock (50 ns - address delay - data setup)!
What else do you want to know?

Regards,

Harald