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05/01/05 12:56
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#92670 - Troubles in POWER DOWN mode

Hello everybody!

It is bad design and I am afraid I have to change it, but I want to get your opinion.

In our 8xC52 system we have two signals: RESET and POWER FAIL. Both are provided by chips from TL77xx series. TL7705 is providing RESET signal, and it is working in typical circuit, described by its application note. TL7702 (with some additional components) is providing POWER FAIL signal, when main power is off, about 300 ms before +5V supply starts to fall down. Its active level is "0".

----------__________ 230VAC

----------___/-______ POWER FAIL
               .  .
----------.--_________ +5V
               .  .
 _______._._/---------- RESET
               .  .
        --->.  .<--- 300ms

The microcontroller is powered from battery (3,6V) through power switch. It switches from 5V to battery supply, when main supply is lower than voltage of the battery. There are some variables stored in 8x52's memory which have to be unchanged. And it is the reason why we are using battery supply.

---------- main supply, 5V -> 0V
                ______________

----------_______________ uK supply, 5V --> 3,6V (battery)

-----------_____/--_____ POWER FAIL

__________________/----__ RESET


POWER FAIL causes interrupt which places the microcontroller into POWER DOWN mode. And it is working excellent, but... When 5V falls down (below approx.4.5V) TL7705 is generating RESET signal, which dissappears when voltage (5V line) is below 2.6V, and the microcontroller powered from the battery, runs its application code from beginning. POWER FAIL is open collector type signal, so it is hard to determine its state, when the output transistor (NPN) is not powered. In this moment Collector is connected via pull up resistor to +5V.

And my question is: how to keep the microcontroller in POWER DOWN mode in this circuit? Is it possible? I am testing PF signal during start up. Sometimes microcontroller reads "0", sometimes "1" (the resistor value is 1k).

Jacek


List of 24 messages in thread
TopicAuthorDate
Troubles in POWER DOWN mode            01/01/70 00:00      
   what's exactly the problem?            01/01/70 00:00      
      the problem...            01/01/70 00:00      
         that's bad...            01/01/70 00:00      
            you are right...            01/01/70 00:00      
               the problem            01/01/70 00:00      
                  A possible solution?            01/01/70 00:00      
                     on chip permanent storage            01/01/70 00:00      
                     caveat            01/01/70 00:00      
                        no caveat when done right            01/01/70 00:00      
                           79 ?            01/01/70 00:00      
                              oh well            01/01/70 00:00      
                           caveat            01/01/70 00:00      
                              non-caveats            01/01/70 00:00      
                  "1" when v.supervisor is not powered            01/01/70 00:00      
                     use open pin            01/01/70 00:00      
   ideas            01/01/70 00:00      
      your idea...            01/01/70 00:00      
         it seems to me,it is working...            01/01/70 00:00      
            please do not            01/01/70 00:00      
   I had an idea...            01/01/70 00:00      
      i tried this...            01/01/70 00:00      
         wow that's bad            01/01/70 00:00      
            i tried this...            01/01/70 00:00      

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