| ??? 11/21/07 01:18 Read: times |
#147286 - Thank you Responding to: ???'s previous message |
Mike said:
Internal TBUFs haven't existed in Xilinx FPGAs sinces the Virtex-2/Spartan-2 series, so that should answer your question. I guess it does! Thanks. Last night I saw an example someplace on the web that showed how to code a tristate bus in Verilog. Now I guess I'll have to try that just for the exercise and see if the synthesizer complains, or silently cooks up some other implementation, or ??? -- Russ |
| Topic | Author | Date |
| Tri-state busses in FPGAs | 01/01/70 00:00 | |
| Tristate Buffers (TBUFs) have been phased out | 01/01/70 00:00 | |
| Thank you | 01/01/70 00:00 | |
| Closing the loop | 01/01/70 00:00 | |
| siumulate? | 01/01/70 00:00 | |
| I didn't simulate it (yet) | 01/01/70 00:00 | |
| hmmm | 01/01/70 00:00 | |
| So ... what about a BIG multi-party bus? | 01/01/70 00:00 | |
| delay | 01/01/70 00:00 | |
| nevertheless ... | 01/01/70 00:00 | |
| re: nevertheless | 01/01/70 00:00 | |
| What disappoints me is the advertising vs reality | 01/01/70 00:00 | |
| advertising | 01/01/70 00:00 | |
| advertising, badvertising ... lies! | 01/01/70 00:00 | |
| oy | 01/01/70 00:00 | |
If only one could rely on them ... | 01/01/70 00:00 | |
| largely, it's because it's not an option | 01/01/70 00:00 | |
| Zackly | 01/01/70 00:00 | |
| If you have internal tristate resources ... | 01/01/70 00:00 | |
| I have new worries now | 01/01/70 00:00 | |
| tristates in FPGAs | 01/01/70 00:00 |