Steve wrote:
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He asks a legitimate question, though without specifying which
chip he is using. He is not a student.
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Hi steve ,
He should have mentioned his chip number this is his one
and only one mistake and thanks for correcting me.




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peter wrote:
it seems, you know not the AT89S8252,
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Hi peter,
Yes I use only 89C5X but dont you think
It is natural to take it granted for 805X ,now it's Ok I have read the data sheet
twice and now I am now comfortable with his question :) I want to discuss a few
things.


If in SPCR bit 4 is set then the device is selected as master SPI mode.
Now if we pull down pin 1.4 it should behave like a slave .The problem
here is what overides what?? is (inverted SS ie pin 1.4 )is treated as a
non maskable interupt to override the setting of SPCR bit4? . I think this
is where the problem of present discussion lies ,I feel SPCR initilization is
a matter of setting default parameters for a particular uC as a slave or
master If I am not mistaken after then Commando (or Tasker ) can control the data flow ?? is that all.








Regards
sanjeev