| ??? 09/07/05 14:17 Read: times |
#100751 - something is defective the chip, your re Responding to: ???'s previous message |
from the P89C51Rx2 datasheet:
"Reset: A high on this pin for two machine cycles while the oscillator is running, resets the device." would anybody be able to give me any clue why myp89c51rc2bn would only be able to communicate with hyperterminal when the reset pin held high something is defective the chip, your reasoning or your measuring. A definite possibility would be that you have destroyed the chips internal reset circuitry. The reset pin on these chips is bidirectional and function as an output when e.g. the internal watchdog bites. If the pin is hard held low at such an occurance it may "burn". Since this is all CMOS a 1k resistor from each reset in- or output to the reset common is a simple means to protect against a "reset fight" causing problems. In some cases a couple of diodaes will be required as well. Erik |
| Topic | Author | Date |
| p89c51rc2bn isp | 01/01/70 00:00 | |
| isp-programming--p89c51rc2bn isp | 01/01/70 00:00 | |
| isp-programming--p89c51rc2bn isp | 01/01/70 00:00 | |
| isp | 01/01/70 00:00 | |
| Lower the baud rate and try again. | 01/01/70 00:00 | |
| isp | 01/01/70 00:00 | |
| ds1223? | 01/01/70 00:00 | |
| isp | 01/01/70 00:00 | |
| ds1232 | 01/01/70 00:00 | |
| isp | 01/01/70 00:00 | |
| He means neither, the 1232 WILL issue a | 01/01/70 00:00 | |
| watchdog fed from ISP | 01/01/70 00:00 | |
| DS1232 ISP | 01/01/70 00:00 | |
| isp | 01/01/70 00:00 | |
| something is defective the chip, your re | 01/01/70 00:00 | |
| oh those datasheets | 01/01/70 00:00 | |
| It's there | 01/01/70 00:00 | |
| #$%^ ! | 01/01/70 00:00 | |
Rev. 02 — 11 October 2004 | 01/01/70 00:00 |