| ??? 09/29/05 14:38 Read: times |
#101723 - Re-read this... Responding to: ???'s previous message |
I have tried AND'ing PSEN and RD to enable the '245 for proper read of all external read's but the system does not boot. I had to re-read this a couple times. I need more coffee... ;) Providing I'm reading this right... What happens when the uC tries to read from RAM? PSEN will not be asserted, and the RD signal will not get to the '245. PSEN only determines which bank of memory you're accessing. RD/WR determine which direction the buffer should run. You haven't mentioned an address latch... What does your memory chip do if you drop the LSB of the address while you flip the '245 around to do a read? I'm guessing this isn't going to work like you expect. You're probably better off latching both bytes of the address with a pair of '573's, and buffer the data lines with the '245. Tristate the '245 when ALE gets asserted, and rig it to default read unless WR is asserted.... or something like that.... Time for more coffee... Rob |
| Topic | Author | Date |
| Buffering address/data bus Basic-52 | 01/01/70 00:00 | |
| direction | 01/01/70 00:00 | |
| Yes | 01/01/70 00:00 | |
| '573? | 01/01/70 00:00 | |
| 245 | 01/01/70 00:00 | |
| Only need one latch | 01/01/70 00:00 | |
| Re-read this... | 01/01/70 00:00 | |
| negative logic | 01/01/70 00:00 | |
| caqll a spade a spade | 01/01/70 00:00 | |
| Ok... I follow you, but... | 01/01/70 00:00 | |
| 74F623 instead of 74F245 | 01/01/70 00:00 | |
| I'd stick with a 245 | 01/01/70 00:00 | |
74AC623 is also fast | 01/01/70 00:00 | |
| A little clarification | 01/01/70 00:00 | |
| if you are ANDing them it will never wor | 01/01/70 00:00 | |
| How fast is your memory? | 01/01/70 00:00 |