| ??? 09/29/05 17:54 Read: times |
#101736 - A little clarification Responding to: ???'s previous message |
The circuit I am using is a standard Basic-52 setup with just buffers on the high address lines, (ls244) and the data bus, (ls or f245). The lower address bus is allready buffered because of the address/data multiplexing. The address buffers work fine, its the data bus that the problem.
By AND'ing PSEN and RD produces a low output on any read, code memory or data memory. This low enables the '245 DIR pin for a read process to the CPU. Under this circuit, Basic will not fire up, when I pull the '245 chip and place jumpers on the data lines, Basic fires up... I am using the standard crystal freq. 11.0592. Brice. |
| Topic | Author | Date |
| Buffering address/data bus Basic-52 | 01/01/70 00:00 | |
| direction | 01/01/70 00:00 | |
| Yes | 01/01/70 00:00 | |
| '573? | 01/01/70 00:00 | |
| 245 | 01/01/70 00:00 | |
| Only need one latch | 01/01/70 00:00 | |
| Re-read this... | 01/01/70 00:00 | |
| negative logic | 01/01/70 00:00 | |
| caqll a spade a spade | 01/01/70 00:00 | |
| Ok... I follow you, but... | 01/01/70 00:00 | |
| 74F623 instead of 74F245 | 01/01/70 00:00 | |
| I'd stick with a 245 | 01/01/70 00:00 | |
74AC623 is also fast | 01/01/70 00:00 | |
| A little clarification | 01/01/70 00:00 | |
| if you are ANDing them it will never wor | 01/01/70 00:00 | |
| How fast is your memory? | 01/01/70 00:00 |