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???
11/24/06 07:58
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#128479 - Monitor comes from EEPROM?
Responding to: ???'s previous message
I tested with the Debug Monitor (SIO-1) download, & not alone SIO-1, but also with all other debug Monitor (SIO-0) present in the folder you specified, I still cannot see the data at RXD0OUT.

Humm.. Then the debug monitor comes from the EEPROM on the board.
Set 'SW2: EEPROM Enable' on the CY3681 to 'No EEPROM' temporarily.

I would like to know if you have also worked on the same Development board, CY3681.

Our CY3681 is busy now, so I checked it on our own test board.

Download this HEX directly to the FX2 using CyConsole (or EZ-USB Control Pannel), without any debug monitor.
This HEX is generated by the source code as follows.
You should see signal on RXD0OUT, when it is not disturbed by the debug monitor.

:1000030090E600E054E74410F090E6727408F0754F
:0C00130098133099FDC29975995580F63C
:0300000002001FDC
:0C001F00787FE4F6D8FD7581070200032D
:00000001FF

// test_uart0.c
//  test for UART0 mode 0
//
// command line to build this file
//      c51 test_uart0.c db oe code small moddp2
//      bl51 test_uart0.obj TO test_uart0 RAMSIZE(256) XDATA(1900h)
//      oh51 test_uart0 HEXFILE(test_uart0.hex)

#define ALLOCATE_EXTERN
#include "fx2.h"
#include "fx2regs.h"

void main(void)
{
    // set the CPU clock to 48MHz
    CPUCS = ((CPUCS & ~bmCLKSPD) | bmCLKSPD1) ;

    PORTECFG  =  0x08;  // enable RXD0OUT
    SCON0     =  0x13;  // mode 0, receive enabled, baud CLKOUT/12, TI = 1, RI = 1

    while(1){
        if ( TI ){
            TI = 0;
            SBUF0 = 0x55;
        }
    }
}

Tsuneo

List of 44 messages in thread
TopicAuthorDate
fx2 serial port mode0            01/01/70 00:00      
   How to post legible code            01/01/70 00:00      
      I dunno            01/01/70 00:00      
      thanks            01/01/70 00:00      
         who is is this microresistor expert?            01/01/70 00:00      
         You, too, can be expert!            01/01/70 00:00      
            well, I did            01/01/70 00:00      
               But of course, you prefer to be obtuse            01/01/70 00:00      
                  no, I am not 'obtuse', just trying to get to the s            01/01/70 00:00      
   Legible code posted,please continue the discussion            01/01/70 00:00      
      That's better            01/01/70 00:00      
         rxd0out            01/01/70 00:00      
            REN_0            01/01/70 00:00      
         I'm puzzled            01/01/70 00:00      
            Bible Time!            01/01/70 00:00      
               Separate RXD0OUT pin            01/01/70 00:00      
                  Now I'm confused, too!            01/01/70 00:00      
                  data is not transmitting            01/01/70 00:00      
               OUCH!            01/01/70 00:00      
                  1Mhz clock            01/01/70 00:00      
                     reply            01/01/70 00:00      
   why no body is replying            01/01/70 00:00      
      Richard, where are you, he is using mode 0!            01/01/70 00:00      
         I didn't have anything to contribute ...            01/01/70 00:00      
      Because no particular error            01/01/70 00:00      
         RxD0out            01/01/70 00:00      
            Debug monitor?            01/01/70 00:00      
               connected to SI0-0            01/01/70 00:00      
                  Debug monitor!!            01/01/70 00:00      
                     mode1            01/01/70 00:00      
                        monitor switches the UART mode            01/01/70 00:00      
                           Tested with SIO-1            01/01/70 00:00      
                              Monitor comes from EEPROM?            01/01/70 00:00      
                                 problem solved            01/01/70 00:00      
                                    Not yet            01/01/70 00:00      
                                       12Mhz            01/01/70 00:00      
                                          Then what was the cause, after all?            01/01/70 00:00      
                                             Don't leave it unsolved            01/01/70 00:00      
                                                ALLOCATE_EXTERN??            01/01/70 00:00      
                                                   ALLOCATE_EXTERN fixes FX2 xdata registers addr            01/01/70 00:00      
                                                      EXTERN ALLOCATE            01/01/70 00:00      
                                                         ALLOCATE_EXTERN fixes PORTECFG address            01/01/70 00:00      
                                                            EXTERN_ALLOCATE            01/01/70 00:00      
                                                               Its ALLOCATE_EXTERN .not EXTERN_ALLOCATE            01/01/70 00:00      

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