| ??? 04/03/07 18:29 Read: times |
#136523 - spi woes |
Ive been looking at implementing a system of interprocessor communications using the SPI interface and am a bit puzzled by the fact that there is no mechanism for the slave to insert wait states ,it appears that the slave has to have a reply ready for the master in the time it takes for the master to send one byte and then restart the clock again.I was thinking that I will have to get the slaves to insert wait states by sending dummy bytes which means implementing a handshaking protocol which kind of negates the whole point of having a fast serial bus.Has anyone had the same problems or am i missing something.And before anyone says it I know that spi is a real interprocessor bus for the reason stated. |
| Topic | Author | Date |
| spi woes | 01/01/70 00:00 | |
| have you considered | 01/01/70 00:00 | |
| yep i think i'll have to go with dedicated hardwar | 01/01/70 00:00 | |
| I2C Has Wait Capability | 01/01/70 00:00 | |
| good choice | 01/01/70 00:00 | |
| make one if you miss it | 01/01/70 00:00 | |
| You got it | 01/01/70 00:00 | |
| re 'dislikes of IIC" | 01/01/70 00:00 | |
Mode Fault interrupt | 01/01/70 00:00 |