| ??? 04/04/08 14:39 Read: times |
#152959 - benchmark Responding to: ???'s previous message |
Oliver Sedlacek said:
If the MAXQ really does one instruction per clock, I think it will edge the C8051F920. I think such comparisons won't really make sense. Even if one instruction is made per clock, the "average work" done by that instruction might be less or more worth than in '51. The '51 is a relatively complex architecture and those who did asm on both '51 and some of the RISCs (AVR is relatively common, as is some ancestor of 6800 (although the RISCness of it is arguable)) usually find the "average instruction" in '51 performing "more" than an "average RISC instruction". What is needed is some sort of a benchmark. As benchmarks usually measure "speed", they might be a relatively good measure of consumption, too. Of course, benchmarks can be constructed to be biased "on request". However, there are some "standard" benchmarks around, e.g. Dhrystone, whether they are good or not, they represent "some" ground for comparison. It would be quite interesting to see a "power-per-Dhrystone-execution" comparison of various microcontrollers... JW |
| Topic | Author | Date |
| Low Power | 01/01/70 00:00 | |
| clocks/instruction - some hairsplitting | 01/01/70 00:00 | |
| not really 'quite' | 01/01/70 00:00 | |
| what the #$&* is "most"? | 01/01/70 00:00 | |
| critical code ... | 01/01/70 00:00 | |
| cache lock won't really help | 01/01/70 00:00 | |
| the issue is critical code | 01/01/70 00:00 | |
| a proper simulator would help | 01/01/70 00:00 | |
| In that case I doubt you will be able to buy ... | 01/01/70 00:00 | |
| This was not a "first" responder ... | 01/01/70 00:00 | |
| Challenger | 01/01/70 00:00 | |
| benchmark | 01/01/70 00:00 | |
| Experiment report: Dhrystone results | 01/01/70 00:00 | |
Nice work | 01/01/70 00:00 |