??? 08/12/08 16:38 Modified: 08/12/08 16:41 Read: times |
#157439 - the datasheet doesn\'t specify the cap Responding to: ???'s previous message |
(I'm using http://www.okisemi.com/datadocs/...154hvs.pdf as a reference. Perhaps you have a more complete data sheet.)
and there's only a 125 k-ohm pulldown on RESET. You probably want to place the cap between Vdd and Reset ... it's positive going ... Perhaps you'll have to wait a few minutes for the RESET level to go below its threshold voltage, or perhaps you'd like to try the "conventional" 8.2 k-ohm external pulldown just to speed things up. If you have a signal generator or pulse generator, you might try injecting a positive-going pulse that's at least 24 clock cycles long. A couple of other questions ... Does it "wiggle" ALE? The datasheet, on very cursory search, doesn't indicate any way of disabling it, so it should become active during each instruction cycle. If it doesn't do that, then it's likely "He's dead, Jim" in the immortal words of "Bones." ( I hear they're bringing that original StraTrek series back, colorized, etc. complete with Jim (the ham) Kirk) I suppose you've checked to see whether the oscillator oscillates. Xtal2 (normally the oscillator output side) is probably the place to "look." If it doesn't, then maybe an external signal source will help establish whether the MCU can be made to operate. OTOH, if it doesn't function when there's a clock applied to XTAL1 (Spec's indicate it's the input side of the oscillator.) then it's probably time for a decent burial. RE |
Topic | Author | Date |
Dead Micro? | 01/01/70 00:00 | |
? RST is tied to Vss through a 10uF tantalum cap | 01/01/70 00:00 | |
Update | 01/01/70 00:00 | |
We have to wonder ... | 01/01/70 00:00 | |
ROM | 01/01/70 00:00 | |
Continuing... | 01/01/70 00:00 | |
Why suspect the piggy-back interface? | 01/01/70 00:00 | |
To: The other Richard | 01/01/70 00:00 | |
Way too easy to fool myself![]() | 01/01/70 00:00 | |
the datasheet doesn\'t specify the cap | 01/01/70 00:00 |