Yes, I liked that approach, too. It's used somewhat differently in the ATAPI standards, though, and that doesn't clarify anything. The authors of that standard clearly define their meaning, however.

At one time, prominent technology (e.g. TTL) persuaded people to look at "low" as the active (asserted) state because TTL could drive many more "standard loads" when sinking current than it could when sourcing. As it happens, MOTOROLA embraced the terminology of "asserted" and "negated" at a time when HCMOS was becoming widely available, ACMOS was, too, and many new devices relied on batteries, making power consumption a major issue that encouraged the use of these technologies. CMOS programmable logic was also becoming popular.

As times have changed, and since "family logic" has been largely replaced by programmable logic, the ways in which we describe logic have changed as well, since, inside programmable logic, it matters very little whether an active signal is positive or negative.

Schematic entry packages now offer the ability to describe, graphically, the content of programmable devices and allow those contents to be exported to programming tools. Consequently, the concepts of "AND" gates and "OR" gates have given way in large part to more general description nomenclature symbolically represented as those functions with either positive or negative inputs or outputs, with input negation taken one or more inputs at a time.

I believe that this makes a more general way of describing the logic inherent in the schematic entry tools, and, of course, in the associated HDL's as well. In the HDL's, the input sense is implicit in the equations, so there's little room for doubt as to what the function actually is.

What's important is that everyone with whom this communication of the logic is to be shared be aware of what is meant by the terms in question and agree upon these terms.

It mystifies me, however, to read that some people believe that a 74xx32 is an OR, because its output is high when either of its inputs is high, and a 74xx02 is a NOR because its output is low when one of its inputs is high, yet a 74xx08 is an OR when either or both of its inputs are low. It would seem to me that, in the interest of consistency, not only with widely used schematic capture software, but with logic, when an OR is equipped with an inverter on its output and an inverter on each input, it remains an OR. The inverter at its output should, IMHO, make it a NOR. I'm clearly not alone in my view, but Erik, and others, aren't either, in their conflicting view.

This is just semantics, isn't it? Is there some physical or mathematical basis for this contradiction?

RE