??? 09/19/08 19:27 Read: times |
#158407 - OT: Freescale Responding to: ???'s previous message |
Although it is off-topic, I don't want all 8051 designers to think that all Freescale processors are backwards.
The bit ordering of the MPC series of processors is Power architecture specific. This is due to the fact that the Power cores are IBM intellectual property, and IBM orders bits with bit 0 being most-significant. All other non-Power processors from Freescale (e.g. 68HCxx) order bits with bit 0 being least-significant. As you state, clear design documentation is vital. Designers must take the time to clearly understand the architectures and data sheets they are working with. |
Topic | Author | Date |
negartive and positive logic ... | 01/01/70 00:00 | |
So what?? | 01/01/70 00:00 | |
Language??? | 01/01/70 00:00 | |
deMorgan ... | 01/01/70 00:00 | |
deMorgan states pos AND = neg OR | 01/01/70 00:00 | |
Is there a contradiction here? | 01/01/70 00:00 | |
NO!, it is a negative NOR | 01/01/70 00:00 | |
I don't follow ... | 01/01/70 00:00 | |
negative logic / means TRUE | 01/01/70 00:00 | |
/ means NOT | 01/01/70 00:00 | |
Negative input NOR = Negative OR | 01/01/70 00:00 | |
I have never heard of | 01/01/70 00:00 | |
NAND and NOR fuzzy? | 01/01/70 00:00 | |
nope | 01/01/70 00:00 | |
I beg to differ | 01/01/70 00:00 | |
Negative In - Positive Out | 01/01/70 00:00 | |
"drawn as" | 01/01/70 00:00 | |
It's semantics ... | 01/01/70 00:00 | |
Assertion and Negation | 01/01/70 00:00 | |
things have changed ... | 01/01/70 00:00 | |
Something to live with | 01/01/70 00:00 | |
OT: Freescale![]() | 01/01/70 00:00 |