Stephane: I do it in a Timer [0] Interrupt (highest priority) 50 usec is just an example. With Cygnal uPs you can go up to 10usec.

Erik: I agree, this can happen as much as it wants. (I'm not talking about bouncing of mechanical rotary switches), lets stick to the example where it would oscillate between A and B: I might miss A or B phases but this would not affect the result in a cumulative way; when it leaves the position of the unstable region it would just nicely continue. What is important that you sample the two bits simultaniuosly and work in the software that evaluates the inc dec part with this stored value. Again, I have to make sure I'm sampling fast enough to fetch a transition from A-B-C without missing B, but even if I would miss B at higher speeds then I can assume, that the direction has not changed since the last reading. The trouble is only if I miss 2 states then.

Werner

PS. this is not theoretic talk but tested in various systems, some also learned the hard way :)