| ??? 06/08/03 06:41 Read: times |
#47794 - RE: Capacitor Responding to: ???'s previous message |
Kai:
Plain and simple. I do not believe in bad science or the spreading of misleading information no matter what the reasons (even for helping beginners learn). I combed through you "authoritative reference document", Philips Application Note ESG89001. There is data in this document that is in Table 3 that helps people understand that the Recommended Decoupling Capacitor for HCMOS logic family is 12.8 nF per gate output. However this recommendation is simply based upon a concept that 50 mA over a 2-3 nanosecond transition time is the dI/dT that you need to design for in order to keep the voltage fluctuations at the Vcc and GND terminals of the logic gate package at... quote "According to good designers practice this voltage fluctuation should be less than 25% of the signal line worst-case noise margin." The noise margin for HCT logic is shown there as 0.7 volts so one would try to design for a voltage fluctuation of less than 0.175 volts. Now I'll agree the information in this document is good information albeit a little dated with all the changes and additional logic families that are on hand these days. But there is no information in this document that the 50 milliampere current demand for a HCT gate is due to the design of the gate output structure having 50 mA through current just so it can achieve the desired gate speed. That information that you gave is just plain bogus. If you look at the typical load capacitance specified for the HCT logic gate and seeing that the output rise / fall time of the gate output is 2-3 nanoseconds slewing the voltage across this load capacitance the full logic swing range of volts you will see that the 50 mA transition current on the Vcc pin is virtually all due to the output stage being asked to source or sink current to charge or discharge this output load capacitance. So if you want to help beginners to learn why don't you instead reference them to a document such as the one we just discussed. You can also simply tell them that during operation a logic chip or a microcontroller has a big need for high frequency current flow on the Vcc and GND pins and that decoupling capacitors serve as a local store for this energy to supply this current via a low inductive path to the IC chip. I think that almost all can understand that and if they want the science they could look at the referenced Philips Application note, which incidently is accessible via this link to App Note ESG89001. Michael Karas |
| Topic | Author | Date |
| Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
| RE: Capacitor | 01/01/70 00:00 | |
RE: Capacitor | 01/01/70 00:00 |



