That information that you gave is just plain bogus. If you look at the typical load capacitance specified for the HCT logic gate and seeing that the output rise / fall time of the gate output is 2-3 nanoseconds slewing the voltage across this load capacitance the full logic swing range of volts you will see that the 50 mA transition current on the Vcc pin is virtually all due to the output stage being asked to source or sink current to charge or discharge this output load capacitance.

Have a look at:

http://www.fairchildsemi.com/an/AN/AN-375.pdf

Here you will find:



Is this also 'plain bogus'? 40mA transition current has NOTHING to do with external capacitive load, as you stated. Of course, additional capacitive load increases transition current even further. But heavy transition current is always flowing, even with no external load, at all!

The only mistake I made, was to focuse on 'through current' only.


When children go to school, they learn in their first physics course, that electrons are moving arround nucleus like the earth and other planets arround sun, forming well defined orbits. But from quantum physics we now, that this is completely wrong. A 'well defined orbit' makes no sense, at all. Nevertheless, children first learn about this orbit.
Having the first look on a topic you need to make some simplifications. You make a model of reality, which shows some points correctly and others not. May be, that I could have spent more efforts on explaining Donald, that 'through current' is only a part of transition current.

Kai