If I understood your question and the diagram right...

The latch store the select input of the ADC (000b to 111b). Why a latch? The selection is made by the processor's data lines, so if you don't use a latch you couldn't do any operation that changed the value of the data lines.

Suppose that instead of a time of conversion of a few microseconds you had a specially slow ADC that would take one hour to do a conversion. It would mean that during one hour you couldn't do any operation that changed the data lines if you hadn't a latch.

The SOC don't needs to be high all the time of conversion! It's just a signal to tell the ADC to "start conversion"

By the way... the conversion time is (accordingly the author) 100 microsecons, not 100 miliseconds, as you wrote.

hth

orlando