Hallo Kelly,

it's very easy to build a crystal oscillator using digital inverters. Two major designs exist, '2-Inverter Oscillator' (also called 'Hegener Oscillator') and 'Pierce Oscillator':




Although looking similar, both circuits are working rather differently.
Digital inverters must be modified in such a way, that they look like analog amplifiers providing an approximately linear performance, means doubling of input voltage will cause doubling of output voltage, quite different to a pure digital inverter, which only knows two different states.
Because of rather high input currents of bipolar logic inverters, chips like 7404 or 74LS04 can only be used in combination with very low resistances of about 1kOhm for TTL-series and about 4.7kOhm for LS-TTL. Schottky-TTL even needs lower resistances.
CMOS inverters are free from this restriction and a few MOhms are allowed. This difference plays the key role, when comparing Hegener and Pierce oscillator!

Unfortunately, in literature many bad explainations about these oscillators can be found. E.g. it's often explained, that quartz produces 180° phase shift, and so, with 180° phase shift of inverter of Pierce oscillator 360° phase shift is achieved, leading to oscillation. But in Hegeners oscillator the same quartz needs to produce 0° phase shift to fabricate oscillation, because there are TWO inverters, producing 360° in the sum. So, where is the truth?
The answer is, that quartz's behaviour is highly influenced by parts joining it, presenting it's characteristic load. And this load is highly different in Hegener and Pierce circuit!!

Let's have a look at equivalent circuit of 4Mhz quartz:



Moving mass is represented by C1 and L1, means Thomson formula yields f = 1/2/pi/sqrt(C1xL1) = 4MHz. R1 represents losses of moving. Also important C2, which represents parasitic capacitance of electrodes, which 'touches' crystal. C2 can be different, 5pF is only a typical value.

With Hegener circuit quartz is seeing a resistance as load, namely feedback resistor of first inverter. Oscillation is achieved, when crystal shows series resonance. Then series impedance of quartz is minimum, approximately identical to R1.
With Peirce oscillator quartz is seeing a capacitance as load, namely capacitance at input of inverter. At series resonance of quartz something different is happening: Quartz in combination with load capacitance produces very sharpely a phase shift from nearly 0° to nearly 180°, when reaching resonance from lower frequencies. A few kHz higher, phase shift again reduces to nearly 0°. This leads to a frequency range where phase shift is nearly 180°. But for achieving a very stable oscillation, this is not enough. So, Rv and to it connected capacitor (C2) is needed to achieve an additional phase shift of about 60° (at 4MHz). Now, 180° phase shift is only valid for two distinct frequencies, being separated by a few kHz. Intense calculation shows, that only the lower one leads to oscillation. Only at this frequency input of inverter gets enough signal level for maintaining oscillation. For other frequency damping is very high, and no oscillation can occur.

So, existance of Rv is essential for functionality of Pierce oscillator. Rv is often located 'internally' of CMOS inverter, means drain source resistance of PMOS/NMOS transistors at output are made rather high ohmic. This is the case for most microcontroller's built-in Pierce oscillator.

Capacitors arround quartz at Pierce oscillator are often (but not always!) chosen, such that series capacitance equalls recommended burden capacitance of manufacturer (often 30pF).
Motorola recommended the following values for Pierce oscillator:

32kHz quartz: C1=22pF, C2=82pF, Rv=750k (!)
500kHz quartz: C1=22pF, C2=82pF, Rv=47k

In both applications phase shift introduced by Rv and C2 is about 85°.

I would suggest for 4MHz application: C1=22pF...33pF, C2=68pF, Rv=2.2k...10k in combination with 74HCU04, 74HC04, MC14060B (then Vcc=+15V!), etc.

One important parameter was forgotten up to now: Drive level.
Drive level is often overlooked, when designing a quartz oscillator. That's fatal, because overranging quartz will lead to very strange effects, not only destruction: Chemical destruction by ion wandering effects, drastical change of parameters, hanging, refuse to start, senseless sudden stop of oscillation, or by other words leaving it's linear operation.

Drive level for HC49 crystals should be less than 1mW. If precision is essential, much lower drive levels can be tolerated. For SMD crystals maximum drive level is even lower, not more than 100µW.
Drive level can be very roughly estimated by Vcc x Vcc / 2 / Rl, where Rl is the feedback resistance of Hegener circuit or Rv of Pierce oscillator. Rl=1kOhm yields a drive level of 13mW, which is quite high. Rl=4.7kOhm yields a drive level of 3mW. Still too high for reliable operation!
Situation with Pierce oscillator is different, again: Although Rv is in the same range, current must also flow through both capacitors, which presents additional impedance and provides a shunt for part of Rv's current. So, resulting current flowing through quartz is much lower.

Only with Pierce oscillator adequate drive levels can be achieved!!

Now, you will say: 'Why not use Hegener circuit with CMOS inverters? Then, feedback resistor can also be made high ohmic and drive level would be acceptable.' Assume we choose 10kOhm for feedback resistor. Then, unavoidable parasitic input capacitance (stray capacitance) of 5pF would yield a parasitic impedance of about 8kOhm at 4MHz. But we know, that normally a pure resistance is needed for maintaining oscillation. No additional phase shift is allowed here! That's the reason, why many designers choose even lower feedback resistors than they must...

Again quite different Pierce oscillator: Anything parasitic at CMOS inverter, like parasitic stray capacitance at input or finite output resistance will not worsen anything, because it only adds a small part of something, which is already there and is highly stable!

That Hegeners circuit cannot have been developped by an engineer having mastered in crystal oscillators, can be seen from the fact, that there's no matching to burden capacitance, recommended by manufacturer. Such designs cannot be expected to work very stable and reliable. Only to oscillate (somehow) is the motto.

Another two points, where Pierce oscillator is advantegous:

1. Propagation delay of inverter introduces some additional phase shift, by this limiting maximum allowed frequency of oscillation. And although both designs suffer from this aspect, Pierce oscillator is better, because phase shift of only ONE inverter must be taken into account.

2. Self oscillation of inverter and harmonic resonances of quartz are much less probable with Pierce oscillator due to additional phase lag stage consisting of Rv and C2.

Beside all these disadvantages of Hegener oscillator, there's still another major problem: Working with TTL, S-TTL or LS-TTL means to struggle with much less linear inverter curves than compared with CMOS inverters. Resistive load of Hegener design is much less linear, than capacitive load of Pierce oscillator. Consequence is, that performance of Hegener oscillator is much worse predictable, than Pierce oscillator. Not only in theory, but also in experience!!! I remember very well those days, when 4MHz Hegener oscillator only worked with Texas' 74LS04, but not with any other manufacturer...

So, Kelly, the clear recommendation goes to Pierce oscillator, at the same time totally being aware of the fact, that Hegener oscillator is one of the most currently used oscillator designs of the past...

Kai