Erik, it was just a formal examle which shows a way by which it is possible to disable the level-riggered interrupt inside ISR.

1) Okay, I may modify it:

INT0_ISR: 
CLR EX0
SETB INT0_HAS_BEEN_OCCURED
RETI

; somewhere in main():
if (INT0_HAS_BEEN_OCCURED)
{
  INT0_HAS_BEEN_OCCURED = 0;
  do_something();
  IE0 = 0;
  EX0 = 1;
}

Here after I re-activated EX0 and /INT0 level is still at low value then I come back to interrupt routine. But BEFORE I set EX0 it is not possible to go there (except GOTO, you know :)

2) Sometimes it may not be possible to detect high2low transaction due some reasons. Why? Read manual(s) which says that transition-activated interrupts ARE NOT recognized due exit from Power-Down mode on some devices, for example AT89S... It says:
- To exit from power-down mode via an interrupt, the external interrupt must be enabled as LEVEL sensitive before entering power-down.

Why do I mention it? Okay, because looking above anybody can understand why it disables EX0 inside ISR. Things are simle: my program sets level-triggered INT0, goes to power-down and sleeps... After external signal comes to MCU, my program wake ups, disable EX0 and goes back to main stream without pay attention on /INT0 level as long as it needs. After all, my program clears IE0, enables EX0 and goes to power-down mode again...

good days!