If my memory serves me correctly, CLI is output at 300baud in asynchronous format. Therefore you need 32 receive only UARTs (UAR!). The obvious solution is to have 32 uarts! Other options might be to - implement 32 UAR's in a fpga, divide and conquer with multiple cpu's say doing 8 inputs each or try and do it with one cpu. It is best if you sample the inputs at 16 times the data rate (16 * 300 = 4800times/second or every 208uS). do a search on bit bashed serial ports to get some example rx code and crunch the numbers - can the cpu process all inputs in the required time and still have so time left over for other things. After doing the numbers this should give you an idea as to how fast a cpu you may require or whether it is best to use multiple cpu's for the task. Using a single 8051 or variant might be pushing things a little as you've used up all your i/o in the normal parts! A Triscend part might be a candidate!!! Although I normally don't like using FPGAs for tasks that can be easily accomplished in cpu's - where speed is critical then the FPGA comes into it's own. If it was my decision I would look at 4 89C2051's doing 8 inputs each.