Steve,

"Is that parallel flash or serial ? It seems to me that given the access speed of USB, you may as well use serial devices."

_All_ NAND flash devices are parallel. Most have eight-bit interfaces, but there are sixteen-bit variants. As far as I can tell, there are only two manufacturers, Toshiba and Samsung, and the devices are mostly compatible (with some quirks: RTFDS!).

Interfacing an 8051 to a NAND flash device should be real simple (although I've never done it -- I've interfaced 'em to PLX PCI chips and the Marvell Discovery's device bus). Basically, you have an 8-bit I/O port that's used to load both commands and data. There's also a write protect, a write strobe, a read strobe, a chip enable, and two interesting controls: the address latch enable and the command latch enable. A busy flag indicates that some internal process is active.

Note that there's no address bus. You access the devices by loading a command, followed by 3, 4 or 5 bytes of address (depending on device size). To load a command, you assert the chip select, the command latch enable and the write strobe while driving the command on the I/O bus. You load addresses by asserting the chip select, the address latch enable and the write strobe while driving the address byte. (Addresses are loaded least-significant byte first.)

The interesting thing about these parts is that you always access the memory in pages. To read, you load the address of the first byte in a page, and the chip goes off and fetches the data from the array and stores it in a page (528- or 2064-byte) register. Then, you start reading from that register by driving read and chip enable; the access is just like reading from an asynchronous FIFO -- a new byte pops out every rising edge of the read enable.

Writing is similar -- you load up a full page in the register, then you drive a "Program Page" command, and the flash goes off and programs the page.

Once a page is programmed, you have to erase it before you write to it again. However, you can't erase a page, you have to erase a whole BLOCK (generally 32 or 64 pages, depending on device size). Block erase takes some milliseconds.

The command, address and data reads and writes are reasonably fast, a 50 ns cycle. However, it takes some microseconds to fetch data from the array and stuff 'em in the register, and even more microseconds to program a page.

So, ya simply write a command, address, and data (if a write), and wait for busy to go away (perhaps an interrupt?), and that's it.

So, if the original poster wanted, he could get one of the Cypress (or other) 8051-based USB micros, wire up a NAND flash chip with zero glue logic, and voila -- instant NAND flash drive! The trick, of course, is for the thing to enumerate as a flash mass storage device, so the OS does the right thing and uses a proper flash file system (one that handles wear levelling and error detection/correction). Of course, if he wants to access the chip in some raw mode, he can do that, too, by having the thing enumerate as some arbitrary bulk device.

Hope this answers your question! I've been NANDing for the last year, and I'm told (by others in my company) that I'm the "expert." (Which means they just pass the stuff off to me ...)

--a