| ??? 02/08/04 16:48 Read: times |
#64238 - RE: Parallel Async Communication Protoco Responding to: ???'s previous message |
patrik wrote
"Is this "bus" going to be used 1) for two way data-communication? ( I do not consider NACK or ACK to be actual data...) 2) with multiple masters?" yes, bus is two way, (NAK or ACK, are not data but as I said it may contain status information if it’s useful for particular application) What you mean from master? It doesn’t have master/slave architecture. Do you mean if there are more than two 8051s? Russel wrote "I do question your use of fifo's." Well, I have nothing against cplds, fpgas but I thought to maintain maximum simplicity and avoid unnecessary complexity, On the other hand you may suggest dual port rams. The advantage of dual port rams is that only one chip is needed per each 8051 but for two way communication 2 fifos are needed but the advantage of fifos is that they do not need an addressing phase. fifos are easier to use they do not need to be programmed and you tell me why not fifos Regards Ebrahim Vakilpour |



