Kevan:
I peered into the DS87C530 data sheet to check if the SCON1 control/status register for the second UART was a bit addressable SFR. It is indeed bit addressable having an SFR address @ 0xC0. (One always has to be careful with these derivative parts becasue very often the SFRs are not always bit addressable).

I would encourage you to look carefully at how you have your code written. Use of the JBC instruction could be argued to be a faulty method because you have cleared the RI bit before having a chance to read the SBUF data register. I always clear RI after reading SBUF.

In many other microcontrollers with on-board UARTs and in many standalone UART chips the receiver data ready status bit gets cleared automatically when the receiver data register is read.

Michael Karas