byte A comes to SBUF and RI is set. You read SBUF, then clear RI. If byte B comes to SBUF between read-clear commands then you lost byte B (it is in UART but you cleared its RI and so do not know that the new byte come). If byte B comes before you read SBUF then you lost byte A. Only if byte B comes after RI has been cleared, then you obtain both bytes A and B (byte B is read at next interrupt).

That used to be unconditionally correct. However, some of the new derivatives have a double buffered UART and, in that case (I do not know the derivative discussed) clearing RI before reading SBUF can, indeed, have strange effects.

HOWEVER "it works when running slower" tell me that the serial ISR is too slow. At 115kb you get a byte every ~100uS and if the uC is not running at a fast clock and the UART ISR is doing more than just feeding a circular buffer it is easy to exceed 100uS.
In the above, do remember to add processing time for ALL interrupts of higher priority and the longest of same priority.
When all that is added together it is darn easy to exceed 100uS.

One suggestion:
make the UART ISR ultra short and give it a higher priority (usually needed with high transmission speeds), if you need to do some serial data processing in a timely manner, continue in a soft interrupt at a lower priority.

Erik