well,

Asume we have connected 573 latch:
- its input D0...D7 to P0;
- its output to A8...A15;
- load enable (E) to a pin of MCU (let say, P1.4);
- output enable (/OE) to GND.

Now in your original program you have something like:

MOVX DPTR,#RAM_ADDR
MOVX  A,@DPTR

now you modify it to:

MOV P0,#HIGH(RAM_ADDR)  ; i.e.: MOV P0,DPH
SETB P1.4               ; load to latch enable
CLR  P1.4               ; lock A8...A15 into latch
MOV  R0,#LOW(RAM_ADDR)  ; i.e.: MOV R0,DPL
MOV  P0,#0xFF           ; prepare as input
MOVX A,@R0

This way, your RAM looks like 256 pages of 256 bytes on each. You may not load high byte of address as long as you do not come over page boundaries. If you come to another page then you must reload latch again with new value (high byte of address).
Note: for such scheme, P0 must have external pull-up resistors. They are required anyway for access LCD.

Regards,
Oleg