| ??? 07/31/04 08:01 Read: times |
#75173 - RE: 1-Wire Protocol for 22.118 MHz Responding to: ???'s previous message |
to Russell...
The question was more of an other kind.. FYI: I've read the datasheet I've got sample code in ASM Counting cycles can be done Insert delays Done some work from VHDL/FPGA Is it better to build an interface (CPLD that handles timing), or is it doable from within the controller (12x) But has anybody ever done it on a 22.118 Mhz? What precautions do i need to take care of? Kind Regards. |
| Topic | Author | Date |
| 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| Imrpoving of the wheel... | 01/01/70 00:00 | |
| RE: Imrpoving of the wheel... | 01/01/70 00:00 | |
RE: Imrpoving of the wheel... | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 | |
| RE: 1-Wire Protocol for 22.118 MHz | 01/01/70 00:00 |