| ??? 08/29/04 11:29 Read: times |
#76566 - RE: matrix keyboard interfacing with 8051 Responding to: ???'s previous message |
On the rows I will use 5 74HC573 latches. with data input from port 0 and each having latch enable from 5 port pins of some other port say P2.0 to P2.4.
On the columns I will use 5 74HC573 buffers. With data inputs from port 0 and each having Gate enable from 5 port pins of some other port say P2.5,P2.6,P2.7,P1.0,P1.1. And what is that? Singing a song? or expanding io? |
