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???
01/06/01 20:09
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#7909 - RE: Kelvin Smith
Uhm,,, (there's no deathline)

When i switch the IO and address lines
nothing needs to adapted if im correct.

And i wont change the read/write lines.
That would cause incompatibility.


When i write to memory address 0 in my program it writes somewhere,,, lets say 0x003D.. Now the data is written to
0x003D i can read the location again just as i read it. the micro thinks its
memory location 0 and the sram device
sees it as 0x003D.

And there's only one memory module
in my project. And even when i would
cascade another 32kb sram module only
the dd15 pin has to inverted on the
CS line of the second memory module.

right?


List of 28 messages in thread
TopicAuthorDate
(S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: Kelvin Smith            01/01/70 00:00      
Hans van Pelt            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: panos kenterlis            01/01/70 00:00      
RE: panos kenterlis            01/01/70 00:00      
RE: panos kenterlis            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: Steve Taylor            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: Testboard with wires            01/01/70 00:00      
RE: How to PCB            01/01/70 00:00      
RE: How to PCB            01/01/70 00:00      
RE: Testboard with wires            01/01/70 00:00      
RE: Henk van den Broek            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      

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