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01/09/01 17:16
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#8033 - RE: (S)RAM addressing
I think it is the responsibility of the engineer to consider layout when assigning pins. I recently had to assign pins for an FPGA. By considering board layout while doing this I was able to keep all of the signals going to/coming from the FPGA on one layer with no vias. This simplified layout, reduced board cost, saved real estate, etc. Maybe to do this the engineer needs to talk to the PCB person early in the design to determine the most realistic position for each component. Some engineers design with little regard to how the board layout will be. For the extreme densities of new designs that simply isn't acceptable. FPGAs, memories, microcontrollers, etc. offer us the luxery of determining what pins do what, it is our responsibility to do so intelligently.

Cory Spackman

List of 28 messages in thread
TopicAuthorDate
(S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: Kelvin Smith            01/01/70 00:00      
Hans van Pelt            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: panos kenterlis            01/01/70 00:00      
RE: panos kenterlis            01/01/70 00:00      
RE: panos kenterlis            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: Steve Taylor            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: Hans van Pelt            01/01/70 00:00      
RE: Testboard with wires            01/01/70 00:00      
RE: How to PCB            01/01/70 00:00      
RE: How to PCB            01/01/70 00:00      
RE: Testboard with wires            01/01/70 00:00      
RE: Henk van den Broek            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      
RE: (S)RAM addressing            01/01/70 00:00      

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