| ??? 12/01/04 13:10 Read: times |
#82283 - all the above Responding to: ???'s previous message |
My understanding to ISR is some routines such like void func(void) interruput 4 started with certain registers operation in main routine
An interrupt is triggered by a bit in a SFR that is set due to a non-cpu event. No operation in the main is involved. RI is set when the UART has received a byte, TI is set when a byte transmission from the UART is complete. While the above is completely true a couple of things: It is possible to create an interrupt by setting the SFR bit that trigger the interrupt in the main code. Also, especially for "bus turnaround" serial it is important to know that RI and TI happen in the middle of the stop bit, not at the end of it. Erik |
| Topic | Author | Date |
| THE TIME OF TI | 01/01/70 00:00 | |
| Bitrate | 01/01/70 00:00 | |
| interrupt-driven | 01/01/70 00:00 | |
| Why interrupt driven? | 01/01/70 00:00 | |
| UART Serial Port Interrupt | 01/01/70 00:00 | |
| all the above | 01/01/70 00:00 | |
| UART communication by UART interrupt | 01/01/70 00:00 | |
| just TI=1 | 01/01/70 00:00 | |
| serial interrupt in adc interrupt | 01/01/70 00:00 | |
| start with something simple | 01/01/70 00:00 | |
| misunderstand behaviour | 01/01/70 00:00 | |
| See the examples | 01/01/70 00:00 | |
| not has to, but can | 01/01/70 00:00 | |
| The difference is | 01/01/70 00:00 | |
| " | 01/01/70 00:00 | |
| He's right | 01/01/70 00:00 | |
| How the 8051 UART works | 01/01/70 00:00 | |
| The TI-bit Set Time | 01/01/70 00:00 | |
| no, at the middle | 01/01/70 00:00 | |
| The Transmitter Part, Actually | 01/01/70 00:00 | |
| Setting of TI | 01/01/70 00:00 | |
| sometimes chip designers listen | 01/01/70 00:00 | |
| So, Erik | 01/01/70 00:00 | |
| where does it happen | 01/01/70 00:00 | |
| Mode 1 TI timing. | 01/01/70 00:00 | |
| How to post code | 01/01/70 00:00 | |
RS485 & bus turnaround | 01/01/70 00:00 |