Actually -- for a given package, all NAND flash devices with the 8-bit data I/O interface are pin-compatible. Similarly, all devices with the 16-bit data I/O interface are pin-compatible. The reason is that there's no separate address bus; you load the address sequentially, a byte at a time. Larger chips require a four- or five-cycle address load (preceeded by a command load), which you do at the start of a page. Once the NAND chip has fetched the data from the flash array and stored it in the output register, you repeatedly read from the I/O port as if the part was a FIFO to get the data.

Yes, I did a NAND flash controller ... ;)

-a