Using interrupts does not help. If you wait in a loop for the interrupt to trigger, you might still have the ISR entered at 2*n clock cycles. Consider this: the interrupt sets a bit flag to indicate it has new data. The main program is waiting for it using jnb myflag,$ and this still takes 2 cycles every loop. Now the ISR latency is 2*n plus a constant.

How many bits are truly random depends on the distribution of the expected event. Think in the lines of jitter. And since this distribution will probably not be block shaped you need the counter to overflow several times within this range.

Maarten