Surely full- and low-speed USB engine requires 48 MHz clock, and simple PLLs on many USB chips accepts just 12MHz crystal or its multiple.
But it is not always true.

As the on-chip PLL on AT89C5131A-M has an divider in its input, it can generate 48MHz from 20MHz crystal.
20 x 12/5 = 48 (MHz)

And it is clearly documented in this section below, that the bootloader accepts 20MHz crystal.
"48 MHz Frequency Auto-Configuration"
(AT89C5131A USB Bootloader p9)
http://www.atmel.com/dyn/resou...oc4287.pdf

Tsuneo