| ??? 04/23/07 05:24 Modified: 04/23/07 05:51 Read: times |
#137781 - error? Responding to: ???'s previous message |
Mike Stegmaier said:
I will explain the "standard" memory addressing scheme that he talks about. When you send or receive data to a certain memory location, a processor loads the address and data. The address consists of two parts. The segment (or selector if you want to call it that), and the offset. Think of a segment as a "group" and think of the offset as members of the group. On an 8051, there are 3 SFRs (special function registers), that define external memory. DPH, DPL, and DPTR. DPH refers to the segment, DPL refers to the offset, and DPTR is both DPH and DPL together to form the complete memory address. I always thought that segment:offset addressing scheme was specific to the 80x86 family of processors (see http://www.et.byu.edu/groups/ec...embly.html ). The 805x microcontroller has a 16-bit address which (in an 8 bit processor) is conveniently composed out of a high-order and low order byte, but sofar I have found no reference to segment:offset addressing in 805x literature. regards Patrick |
