??? 04/23/07 19:53 Read: times Msg Score: +2 +1 Good Answer/Helpful +1 Informative |
#137840 - You failed to make that point! Responding to: ???'s previous message |
Mike Stegmaier said:
I'm trying to compare an 8051 to an x86. Well, this is what you actually said: Mike Stegmaier said:
When you send or receive data to a certain memory location, a processor loads the address and data. The address consists of two parts. The segment (or selector if you want to call it that), and the offset. You just said, "a processor" - you didn't even mention the x86, and you didn't explain that the 8051 is not like this. In fact, most processors are not like this! Sorry, if you didn't like the comparison. It's not that I didn't like it - it's totally irrelevant to the discussion! Many would say that the segmented approach is unnecessarily confusing and a flaw in the x86 design - there is really no reason to bring it in here just to confuse the issue I know in reality that an 8051 doesn't use a segment:offset routine There's no "in reality" about it - it is a complete irrelevance to any 8051 discussion. It is a totally unnecessary complication here! I explained it like that is because I was explaining what DPTR is and how it works. And how does it help that explanation? The DPTR is a 16-bit register that holds a 16-bit address value - that's all there is to it. It's quite simple. How do people that use x86 processors be able to use MMIO on x51 processors if I didn't put that explanation? If they can cope with the Segment+Offset on the x86, they should have no problem coping with the far simpler approach of the 8051! they would think that MMIO is very different on an x51. Only insofar as the 8051's memory addressing is different from the x86. Anyhow, who mentioned x86 in the first place? for you x86 users, high byte and low byte is like the "segment and offset". No, they are not! The x86's Segment & Offset are two 16-bit values that together represent a 20-bit value. Forming the 20-bit Effective Address requires shifting the Segment and adding the Offset. This means that a byte in memory can be accessed by a large number of different Segment+Offset combinations. DPL and DPH are simply the low- and high-bytes of a two-byte (16-bit) value. This is quite unlike a Segment+Offset. Each byte in the 8051's external address spaces can be addressed by one - and only one - 16-bit address; ie one - and only one - combination of DPL+DPH. Now the best way to use it if you are good with programming an x86 is to think of DPH as segment and DPL as offset Not really. The best way is to think "Ah! a straightforward 16-bit address - no more messing about with Segment+Offset!" Ok, fine, so I get -1 for trying to compare an x51 to an x86. But you didn't do that! You just threw a whole load of irrelevant stuff into an 8051 discussion without even pointing out that it related to the x86! the reason why I mentioned segments and offsets is because I want a user who can program an x86 be able to program an x51. Who is this imaginary user? Nobody asked about x86. It seems most likely that the OP has no idea about MMIO at all on any processor. So those that tried to give me -1 for my last post, I'm sorry for trying to help someone out. The OP obviously had very basic problems with understanding anything about MMIO at all - throwing in irrelevant details about totally unnamed. off-topic processors is not going to help him! |