Another way that could be very efficient to count pulses would be to implement it as a parallel processing algorithm. A simple algorithm can be made that will detect leading edges of pulses on all eight inputs at a time using byte logical operators. In similar manner the pulses can be counted with what are known as "vertical counters" implemented as bit serial elements, eight per byte, across a series of RAM bytes. The number of bytes chosen can be selected to balance how many counts to accumulate versus how much processing it takes to extract the bit serial counts out to more conventional bit parallel count values.

I would expect this technique could be used to count pulses on 12 inputs or even 16 inputs for pulses that occur at surprisingly high rates. Plus - this would require no timer resources at all.

The logic to detect the edges on eight inputs from a port can be implemented using logic similar to:

Byte Variables:
   port_value    <-- holds current value from the port
   prev_value    <-- holds previous input from port
   edge_value    <-- has computed 1 bits where a rising edge
                     is detected

Edge Detect: (do this in the polling loop)
   port_value <-- port                        ; get 8 inputs
   edge_value <-- port_value AND prev_value   ; coupute edge bits
   prev_value <-- NOT port_value              ; save NOT of port bits

The vertical counters can be implemented via simple logical operators. The algorithm could follow the concept shown here with counters that can accumulate up to 32 pulse counts. (The number of bits for each counter can be easily expanded to as many as required). This would be done once each time around the polling loop.

Byte Variables:
   edge_value    <-- has computed pulses to count
   carry_value   <-- holds the carry values from bit to bit
   bit0_value    <-- holds bit 0 of 8 counters (LSB)
   bit1_value    <-- holds bit 1 of counters
   bit2_value    <-- holds bit 2 of counters
   bit3_value    <-- holds bit 3 of counters
   bit4_value    <-- bolds bit 4 of counters (MSB)

Count Logic:
   carry_value <-- edge_value AND bit0_value
   bit0_value <-- edge_value XOR bit0_value

   edge_value <-- carry_value
   carry_value <-- edge_value AND bit1_value
   bit1_value <-- edge_value XOR bit1_value

   edge_value <-- carry_value
   carry_value <-- edge_value AND bit2_value
   bit2_value <-- edge_value XOR bit2_value

   edge_value <-- carry_value
   carry_value <-- edge_value AND bit3_value
   bit3_value <-- edge_value XOR bit3_value

   edge_value <-- carry_value
   carry_value <-- edge_value AND bit4_value
   bit4_value <-- edge_value XOR bit4_value

With careful assembly language programming it should be possible to do the edge detect logic with 6 or 7 instructions. Similarly the count logic can be implemented with 5 or 6 instructions. If one follows this example with a five bit accumulator for each input then the total instructions to detect eight inputs and accumulate the pulse counts can be:

      InstTotal = 7 + (6 * 5) = 37 instructions.

You would double this for accumulating the pulse counts for two ports worth of inputs.

Maybe someone else here is interested in showing actual minimized 8051 assembler language source for this.

Good Luck

Michael Karas