| ??? 04/15/09 21:38 Read: times |
#164637 - Why? Responding to: ???'s previous message |
This is the STATE of the ports, just before EA is enabled,
The configuration of the ports is // TxD = push-pull, RxD = input P1M1 &= ~0x01; P1M2 |= 0x01; P1M1 |= 0x02; P1M2 &= ~0x02; Surely it is acceptable for a Tx to have logic 1 on on it? Please advise if this is not the case and I will look more closely at this. Regards Marshall |
| Topic | Author | Date |
| RI always set after EA Set | 01/01/70 00:00 | |
| I don't know, but... | 01/01/70 00:00 | |
| your application should be designed so as to be tolerant | 01/01/70 00:00 | |
| Check if the Rx pin is pulled low? | 01/01/70 00:00 | |
| Ports are set as: | 01/01/70 00:00 | |
| without looking at the datasheet, I can say it is wrong | 01/01/70 00:00 | |
| Why? | 01/01/70 00:00 | |
| I did not clean my glasses | 01/01/70 00:00 | |
| Config Registers | 01/01/70 00:00 | |
| Check the BR and FE bits in SSTAT. | 01/01/70 00:00 | |
| Yes they are set - Why? | 01/01/70 00:00 | |
| When do you start the BRG? | 01/01/70 00:00 | |
| BRG set as part of UART Init (before EA) | 01/01/70 00:00 | |
| I would... | 01/01/70 00:00 | |
Thanks - Done | 01/01/70 00:00 | |
| aren't the LPC9xx's pins... | 01/01/70 00:00 | |
| Yes but - it also happens in the real hardware | 01/01/70 00:00 | |
| the point of asking nonsense questions... | 01/01/70 00:00 | |
| Understood, appreciate being 2nd guessed | 01/01/70 00:00 | |
| The Teddy Bear Effect | 01/01/70 00:00 |