??? 08/25/09 06:43 Read: times |
#168530 - NXP??? Responding to: ???'s previous message |
Erik Malund said:
Philips/NXP seems to change parallel programming algorithm for every new chip they introduce, but have steadfastly stuck to UART for their serially programmable devices. The LPC9xx-s' default programming method is SPI-ISP (a.k.a. ICP), with a non-SPI timed-pulses "lead-in"; very difficult to implement using a "plain cable attached to PC". Only the bigger models incorporate the optional UART-ISP, but that sits in FLASH thus gets erased too easily. Also, once you modify the "fuses", the UART-ISP entry method gets to be "timed pulses", too. That's far from the level of comfort what I expect from the UART-ISP bootloaders the 'RD2s (a Philips invention, indeed) have. JW |
Topic | Author | Date |
Addressing bit memory indirectly | 01/01/70 00:00 | |
Not possible. | 01/01/70 00:00 | |
so why Bit addressable memory? | 01/01/70 00:00 | |
sure you can and THINK | 01/01/70 00:00 | |
Fast and saves code and RAM space | 01/01/70 00:00 | |
No such instruction... | 01/01/70 00:00 | |
Thanks so much | 01/01/70 00:00 | |
That's _too_ limited... | 01/01/70 00:00 | |
Not vast - actually quite small. | 01/01/70 00:00 | |
bible time | 01/01/70 00:00 | |
store bit address... | 01/01/70 00:00 | |
Thanks | 01/01/70 00:00 | |
if '2051' is the Atmel, then | 01/01/70 00:00 | |
"cable" only for the "S" | 01/01/70 00:00 | |
I second the motion and add | 01/01/70 00:00 | |
I have... | 01/01/70 00:00 | |
Smoking bad for the health | 01/01/70 00:00 | |
an issue many newbies are not aware of is ... | 01/01/70 00:00 | |
NXP??? | 01/01/70 00:00 | |
Design flaw? | 01/01/70 00:00 | |
a feature | 01/01/70 00:00 | |
cheap | 01/01/70 00:00 | |
Code: Addressing bit memory indirectly![]() | 01/01/70 00:00 |