I thought that when accessing onboard Xram nothing happened on the portpins.

I do not know, based on what you state, what the problem is. However I have a lot of units running with the 668 that use ERAM {internal XRAM) only where it would be a disaster if port 2 "wiggled". These do not do any memory mapped I/O or XRAM. Also ALE is enabled when I use the ICE, but not in deliverables. Thus the problem must be in the way you treat the switching between ERAM and XRAM.

Sorry I cant say more

Have fun,

Erik