Cory:
The bus loading to the degree you are talking about will typically just slow down the rise times and to a lesser degree the fall times of the signals on bus. This will appear as a need for longer access time to the RAM / FLASH. The best way to avert problems is to look at the cycle and strobe timing needed for the devices on the bus and see if the processor produces cycles that are too fast for the devices. You then have the choice to select faster FLASH and RAM devices or to slow down the processor timing.

Note as an interesting observation, it is sometimes possible to get higher overall performance avoiding the use of stretch cycles and instead lower the processor clcok speed instead. The stretch cycle timing goes in fixed step sizes from one choice to the next, while you could vary the crystal to get timing in-betweeen. Be wary of what you change the crystal to however in that it may be very difficult to get the baud rates you need for serial I/O and/or it may be difficult to purchase a crystal with a 28.5631 MHz frequency.

Michael Karas