Thanks for the input!

My concern isn't that I am exceeding the bus loading of the controller, but that of the FLASH and SRAM. They are both characterized at 30pF, and I am currently at 70pF.

I agree that it may work. I am going to move a latch (not the AD latch) onto another bus segment, that should get me down to around 60pF. I think that combined with the timing margins I have with 45ns FLASH and 15ns SRAM should be enough. I may be able to run it slower, but that is giving up, isn't it!?

I have used ic = C(dv/dt) to estimate the time necessary to drive the bus. The problem is I don't know how much instantaneous current the data pins of the FLASH and SRAM can drive. I have estimated 10mA. Assume a 2V swing, using the 30pF difference between the 30pF spec and the 60pF I will have. Is this valid? Of course this is just a very rough estimate.

dt = dv/(ic/c) = 2/(10mA/30pF) = 6ns

That would be 6ns beyond their timing.

I think that the addition 30pF beyond the memory specs may increase the power dissipation of the memory somewhat.

Is it really that uncommon to put 5 devices other than memory and the AD latch on the AD bus of a 80C320 running at 33.0MHz? :-)

Cory Spackman