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???
06/20/03 15:44
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#48909 - RE: Port 0 (Back post)
Responding to: ???'s previous message
Hallo Sushil,

as you did not state up to now, whether you want to use Port 0 as output port or for accessing memory, I try to give an answer for both situations.

If you try to use Port 0 for memory accessing, you need no additional pull-up. Then, and only then, an additional active pull-up is turned on, when emitting '1' on Port 0 lines. This, in order to fast charge-up stray capacitance on bus.

When you use Port 0 as output port, this active pull-up is never turned-on! You will allways have an open-collector output, which is able to produce low level without pull-up, but not high level. It's always neccesary to have some path to Vcc from open collector output, which is lower ohmic than turned-off output transistor. Also voltage drop accross this pull-up caused by any leakage current (into turned-off output transistor and all succeeding inputs) must be so small, that input voltage for succeding circuitry is still high level. This is the first criterium, and a 10k pull-up resistor would be enough low ohmic for almost all static purposes. Even leakage current of up to 10µA would cause a voltage drop of only 0.1V. So, high level output voltage of Port 0 will then be higher than 4.9V.

Second criterium is, that this pull-up must charge up any stray capacitance! So, if you need a fast edge at output of Port 0 when a 0-to-1 transition shall occur, time constant of RC plays a role. R is pull-up resistance, C is stray capacitance of port line and succeding circuitry.
Assume you have R = 10k and C = 50pF, than RC = 500nsec. Rise time is 2.3 x RC = 1.15µsec. So, when you want to drive usual 74HCMOS without Schmitt-trigger input you will have a problem in some cases, because rise time of signal must be less than 500nsec for 74HCMOS. CD4000 series would accept this slow rise time, but 74HCMOS can make trouble. To achieve a rise time of 300nsec, R = 2k7 must be used.
A better way is to minimize stray capacitance, e.g. by inserting a 74HCMOS buffer sitting next to Port 0 output. Stray capacitance will then be reduced to about 20pF (max) and pull-up resistor can be increased to 6k8. Big stray capacitance of succceding circuitry then is driven by very low ohmic 74HCMOS output driver stage (about 50 Ohm). You can also use CD4000 buffer, of course, but then output driver impedance is about 500 Ohm.
Keep in mind, that each input of additional gate gives up to 10pF stray capacitance!

Bye,
Kai

List of 18 messages in thread
TopicAuthorDate
Port 0 (Back post)            01/01/70 00:00      
   RE: Port 0 (Back post)            01/01/70 00:00      
   RE: Port 0 (Back post)            01/01/70 00:00      
   More details needed!            01/01/70 00:00      
   RE: Port 0 (Back post)            01/01/70 00:00      
      RE: Port 0 (Back post)            01/01/70 00:00      
         RE: Port 0 (Back post)            01/01/70 00:00      
            RE: Port 0 (Back post)            01/01/70 00:00      
            RE: Port 0 (Back post)            01/01/70 00:00      
               RE: Port 0 (Back post)            01/01/70 00:00      
   RE: Port 0 (Back post)            01/01/70 00:00      
      RE: Port 0 (Back post),erik            01/01/70 00:00      
         It's not your mistake, Pranav...            01/01/70 00:00      
   RE: Port 0 (Back post)            01/01/70 00:00      
      RE: Port 0 (Back post)            01/01/70 00:00      
         copper trace capacitance            01/01/70 00:00      
            RE: copper trace capacitance            01/01/70 00:00      
         RE: Port 0 (Back post)            01/01/70 00:00      

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