hi,
the first idea was the usage of TWO 4Mb FLASH chips with access time 70...100ns, and select them depend on state of the line A0. It would help if your program have no jumps and interrupts in the whole (=
Okay, then I twice read your posting and gone confused as for now. I even have downloaded the manual and checked it too. Here is the result.
OSC 16Mhz produces clock cycle = 62,5ns. In X2 mode the frequence of both ALE and PSEN are 1/3 of OSC and so external program is fetched one time per 187,5ns. Well, it is theory. Nevertheless, at page 43 of the manual there is example for:
- VCC=2,7...5,5V, 6-clock mode, OSC=16Mhz
The most important values are:
- Address to valid instruction in ... 101,25ns
- PSEN low to valid instruction in ... 38,75ns

First value is the time of FLASH columns/lines address decoding. Second value is the time for switch FLASH output latches enabling.
For example, AMD Am29LV081B-70 has:
- Address to Output Delay ... 70ns
- Output Enable to Output Delay ... 30ns

And so: connect /CE to ground, /OE to PSEN. It will work or do I miss some details?
cu