| ??? 12/30/03 22:12 Read: times |
#61627 - RE: Atomic 16bit read Responding to: ???'s previous message |
well,
1) as already has been mentioned, egde triggered interrupt is latched and not be lost as long as next event comes to MCU while previous one is not processed. 2) Use double-buffered counter and a semaphore. Oh, yes, it looks like a paranoya :) but it solves all the problem. What I mean is: ISR has main counter and its copy (2+2 bytes). Main counter is increased at each event. At exit from ISR main counter is copied into backup buffer. The copying may be avoid with a flag: if flag is set then ISR does not produce a copy. So, main program sets this flag, reads backup buffer (ISR does not modify it bacause bit is set) and then clears flag to obtain fresh value next time. Good days! |



