Okay, my idea is: 74373/573 contains static D-trigers opposite to dynamic ones in 374/574. It does not need with an edge to latch data, it is level-activated. So the idea is that 373/573 accepts data during all the time WR is active. It starts to accept data at high level on pin 11 and stops when the level comes zero. As result it easy fixes "transition" effects as well as impulse hindrances on data lines especially for long wiring. Here we use such scheme for 1 meter FRC.

Hallo Oleg,

I did never observe a big difference between those two. But what you tell is quite interesting, and I will keep it in my mind, when in the future some problems with HC574 will occur. Thank you very much for this information. It was new to me!

May be there's some data which demonstrates this difference: If you have a look at Cpd, called 'power dissipation capacitance', which is a measure of how much power supply current is drawn in the moment of latching, then HC574 with Cpd = 100pF per latch draws twice as much supply current (the very spiky one!) than HC573 with Cpd = 50pF per flip-flop. This demonstrates that HC573 and HC574 internally work quite differently!

You told about 1m FRC. Did you use series termination? Grounded wires between signal lines? Any filtering? Please, tell me.

Kai